By guest poster Phillip E. Tuma of the 3M Company
Use of passive 2-phase immersion for computing equipment is largely limited to IBM’s exploration of the technology for cooling bipolar chips in the 1970s. The liquid encapsulation module or LEM, for example, was a 10×10 array of 4.6×4.6mm chips immersed in C6F14 liquid that boiled on the bare silicon. A vulnerability of this technique is the phenomena of incipience overshoot, a large temperature excursion before the inception of boiling that can allow a chip to overheat or stress it mechanically during the sudden temperature drop that follows. This issue was overcome by modifying the silicon surface with sandblasting followed by an aqueous KOH treatment. It was also observed that fluid-borne contaminants could distill out of the fluid onto or under the chip. Under-filling with beeswax kept contaminants away from the C-4 solder bump connections.
Boiling C6F14 from silicon produces heat transfer coefficients ~0.6W/cm2-K resulting in superheats, Tc-Tf, exceeding 20°C. LEM chips could dissipate up to 4W and typically operated quite close to the critical heat flux (CHF) of the fluid, a fact that limited the potential of the technology for future generations of higher power chips. The idea of attaching “pegs” or fins to a chip’s substrate to spread heat was known. If such fins could be applied to the silicon surface and enhanced with Linde’s (now Honeywell/UOP’s) High Flux™ porous metallic surface coating, which was commercially available at the time, Tc-Tf might have been dramatically reduced and risk of chip damage resulting from incipience overshoot would have been eliminated. However, as one author noted “it is unlikely that chips can be altered to accommodate such surface treatments.” There was fear of yield loss and no proven method of attachment.
1965 ad showing the inertness and dielectric properties of immersion cooling.Though qualified as a shippable product, the LEM was abandoned in favor of thermal conduction module (TCM) technology which provided slightly better performance at the time and could be readily modified to accommodate substantially increased chip heat fluxes. In the years that followed, there were numerous publications addressing the limitations of 2-phase immersion cooling. If you look back and study it, much of this work seems predicated on the assumption that 2-phase immersion cooling should be applied to the bare silicon and should be an optimal method, owing to the elimination of a thermal interface, if only the requisite heat fluxes could be managed. Research on subcooling, forced flow and other techniques for enhancing passive 2-phase immersion subsided a bit with the advent of complementary metal oxide semiconductors (CMOS) which were easily air cooled. However, CMOS quickly evolved to produce system densities that challenged air cooling and chip heat fluxes that far exceeded the CHF of passive boiling. Cray employed 2-phase spray cooling as a means to extend the heat flux capability of bare die cooling but there has been little work since on passive techniques.
In the years since IBM’s abandonment of the LEM, thermal interface technology has matured. Modern packages that incorporate heat spreaders with high performance interfaces are routine. It is in this context that the notion of attaching an enhanced copper “peg” to a bare silicon surface is being revisited with the peg replaced by a modern lid. By applying a boiling enhancement coating similar to the High Flux™ surface atop an optimized lid, virtually any chip power can be accommodated, passively, with chip-to-fluid resistances superior to most active techniques, even spray cooling. New approaches to passive 2-phase immersion promise to simplify its adoption and research has shown impressive power density and energy efficiency capabilities.